1. Field of the Invention
The present invention is in the field of digital filters, and, more particularly, in the field of digital decimation filters wherein an input is sampled at a first frequency and a filtered output is provided at a second frequency lower than the first frequency.
2. Description of the Related Art
In digital systems, it is frequently necessary to change from a predetermined input sampling frequency, at which the digital data to be processed occur, to a lower output sampling frequency. In the literature, this is referred to as "decimation". It consists of two steps: filtering and subsequent down-sampling. The fact that, because of the down-sampling, not each of the output data of the decimation filter is needed, permits a simplification of the filter structure. In many digital systems, particularly in connection with so-called oversampling analog-to-digital converters (where the sampling frequency is higher than it would have to be in accordance with the sampling theorem), a cascade of several moving-time averagers is used as the decimation filter. The transfer function of the decimation filter is: ##EQU1## where n is the integral quotient of the input sampling frequency r of the input data and the output sampling frequency d of the output data, m is a number which specifies how many sections are cascaded, b is a multiplication factor, and z is the complex frequency variable.
A decimation filter generalized by an integral parameter k greater than or equal to one makes it possible to vary the bandwidth as a function of k; the transfer function is then: ##EQU2## This transfer function has at least simple zeros (corresponding to infinite attenuation) at frequencies which are an integral multiple of d/k, and m-fold zeros at multiples of d. If the two's complement notation of binary numbers is used in the realization of a decimal filter with the latter transfer function (2), no limitation of generality follows from the interpretation that the binary numbers are only numbers in the range between -1 and +1. The decimation filter is definitely not overloaded if the condition b less than or equal to 1/kn.sup.m is satisfied.
Since the transfer function H(z) can be written as a product of two or more factors, a multiplicity of different decimation-filter circuits for realizing the transfer function are obtained according to the order of the factors. Of particular interest are realizations which require a minimum circuitry, i.e., which take up as little chip area as possible if the filter circuit is implemented as a monolithic integrated circuit.